tc1225/6/7-1 3/24/00 tc1225 TC1226 tc1227 ?2001 microchip technology inc. ds21369a inverting dual (? in , ?v in ) charge pump voltage converters features small 8-pin msop package operates from 1.8v to 5.5v up to 5ma output current at ? in pin up to 1ma output current at ?v in pin ? in and ?v in outputs available low supply current .......................................... 120 a (max) for tc1225 .......................................... 360 a (max) for TC1226 .......................................... 1.5ma (max) for tc1227 typical applications lcd panel bias cellular phones pa bias pagers pdas, portable data loggers battery powered devices general description the tc1225/1226/1227 are cmos dual inverting charge pump voltage converters in 8-pin msop packages. an on- board oscillator provides the clock, and only four external capacitors are required for full circuit implementation. switch- ing frequencies are 12khz for the tc1225, 35khz for the TC1226, and 125khz for the tc1227. these devices provide both a negative voltage inversion (available at the ? in output) and a negative doubling voltage inversion (available at the ? v in output), with a low output impedance capable of providing output currents up to 5ma for the ? in output and 1ma for the ?v in output. the input voltage can range from +1.8v to +5.5v. ordering information part no. package osc freq (khz) temp range tc1225eua 8-pin msop 12 ?0 c to +85 c TC1226eua 8-pin msop 35 ?0 c to +85 c tc1227eua 8-pin msop 125 ?0 c to +85 c typical operating circuit c1+ c2+ v in v in c1 c2 c2 c1 tc1225 TC1226 tc1227 c out1 2 v in + + + + c out2 output 1 output 2 input gnd pin configuration 1 2 3 4 8 7 6 5 tc1225 TC1226 tc1227 2v in v in v in c2 gnd c1 c1+ c2+ 8-pin msop notes: 1) c1 and c out1 must have a voltage rating greater than or equal to v in 2) c2 and c out2 must have a voltage rating greater than or equal to 2v in
2 inverting dual ( v in , 2v in ) charge pump voltage converters tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 ?2001 microchip technology inc. ds21369a pin description pin number name description 1 c1 c1 commutation capacitor negative terminal. 2 c2+ c2 commutation capacitor positive terminal. 3 c2 c2 commutation capacitor negative terminal. 4 ?v in doubling inverting charge pump output (? x v in ). 5 gnd ground. 6v in positive power supply input. 7 c1+ c1 commutation capacitor positive terminal. 8 v in inverting charge pump output (? x v in ). absolute maximum ratings* input voltage (v in to gnd) ......................... +6.0v, ?0.3v output voltage (? in , ?v in to gnd) ........ ?2.0v, + 0.3v current at ? in , ?v in pins ...................................... 10ma short-circuit duration ? in , ?v in to gnd ........ indefinite operating temperature range ............... ?40 c to +85 c power dissipation (t a 70 c) msop-8 ............... 320mw storage temperature (unbiased) ......... ?65 c to +150 c lead temperature (soldering, 10sec) .................. +260 c *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics: t a = ?0 c to +85 c, v in = +5v, c1 = 3.3 f, c2 = 1 f (tc1225); c1 = 1 f, c2 = 0.33 f (TC1226); c1 = 0.33 f, c2 = 0.1 f (tc1227) unless otherwise noted. typical values are at t a = +25 c. symbol parameter device test conditions min typ max unit i dd supply current tc1225 75 120 a TC1226 200 360 tc1227 625 1500 v min minimum supply voltage all r load = 1k ? for ? in output 1.8 v r load = 10k ? for ?v in output v max maximum supply voltage all r load = 1k ? for ? in output 5.5 v r load = 10k ? for ?v in output f osc oscillator frequency tc1225 8.4 12 15.6 khz TC1226 24.5 35 45.5 tc1227 65 125 170 v eff1 voltage conversion all r load = for ? in output 96 99.5 % efficiency (stage 1) r load = for ?v in output v eff2 voltage conversion all r load = for ? in output 94 99 % efficiency (stage 2) r load = for ?v in output r out1 output resistance all i load = 0.5ma to 5ma 45 80 ? for ? in output (note 1) no load at -2v in output r out2 output resistance all i load = 0.1ma to 1ma 135 420 ? for ?v in output (note 1) no load at -v in output notes: 1. capacitor contribution is approximately 20% of the output impedance [esr = 1/ pump frequency x capacitance)].
3 tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 inverting dual ( v in , 2v in ) charge pump voltage converters ?2001 microchip technology inc. ds21369a detailed description the tc1225/1226/1227 dual charge pump convert- ers perform both a ?x and ?x multiply of the voltage applied to the v in pin. output v in ?provides a negative voltage inversion of the v in supply, while output ?2 v in provides a negative doubling inversion of v in . conversion is performed using two synchronous switching matrices and four external capacitors. figure 1 (below) is a block diagram representation of the tc1225/1226/1227 architecture. the first switching stage inverts the voltage present at v in and the second stage uses the v in ?output generated from the first stage to produce the 2v in ?output function from the second stage switching matrix. each device contains an on-board oscillator that syn- chronously controls the operation of the charge pump switch- ing matrices. the tc1225 synchronously switches at 12khz, the TC1226 synchronously switches at 35khz, and the tc1227 synchronously switches at 125khz. the different oscillator frequencies for this device family allow the user to trade-off capacitor size versus supply current. faster oscil- lators can use smaller external capacitors but will consume more supply current (see electrical characteristics table) . figure 1. functional block diagram applications information output voltage considerations the tc1225/1226/1227 performs voltage conversions but does not provide any type of regulation. the two output voltage stages will droop in a linear manner with respect to their respective load currents. the value of the equivalent output resistance of the ?v in ?output is approximately 50 ? nominal at +25 c and v in = +5v. the value of the ?2v in output and is approximately 140 ? nominal at +25 c and v in = +5v. in this particular case, ?v in ?is approximately ?5v and 2v in ?is approximately ?0v at very light loads, and each stage will droop according to the equation below: v droop = i out x r out [-v in output] = v out1 = ?(v in ?v droop1 ) [-2v in output] = v out2 = v out1 ?(v in ?v droop2 ) where v droop1 is the output voltage droop contributed from stage 1 loading , and v droop2 is the output voltage droop from stage 2 loading. charge pump efficiency the overall power efficiency of the two charge pump stages is affected by four factors: (1) losses from power consumed by the internal oscil- lator, switch drive, etc. (which vary with input voltage, temperature and oscillator frequency). (2) i 2 r losses due to the on-resistance of the mosfet switches on-board each charge pump. (3) charge pump capacitor losses due to effective series resistance (esr). (4) losses that occur during charge transfer (from the commutation capacitor to the output capacitor) when a voltage difference between the two capacitors exists. most of the conversion losses are due to factor (2), (3) and (4) above. the losses for the first stage are given by equation 1a and the losses for the second stage are given by equation 1b. p1 loss (2, 3, 4) = i out1 2 x r out1 where r out1 = [ 1 / [ f osc (c1) ] + 8r switch1 + 4esr c1 + esr cout1 ] equation 1a. p2 loss (2, 3, 4) = i out2 2 x r out2 where r out2 = [ 1 / [f osc (c2) ] + 8r switch2 + 4esr c2 + esr cout2 ] equation 1b. 2v in v in + + c out1 c out2 v in switch matrix (1st stage) switch matrix (2nd stage) oscillator c1 + c2 +
4 inverting dual ( v in , 2v in ) charge pump voltage converters tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 ?2001 microchip technology inc. ds21369a the internal switch resistance for the first stage (i.e. r switch1 ) is approximately 3 ? and the switch resistance for the second stage (i.e. r switch2 ) is approximately 7 ? . the losses in the circuit due to factor (4) above are also shown in equation 2a for stage 1 and equation 2b for stage 2. the output voltage ripple for stage 1 is given by equation 3a and the output voltage ripple for stage 2 is given by equation 3b. p loss1 (4) = [ (0.5)(c1)(v in 2 ?v out1 2 ) + (0.5) (c out1 ) (v ripple1 2 - 2v out1 v ripple1 ) ] x f osc equation 2a. p loss2 (4) = [ (0.5) (c2) (v in 2 ?v out2 2 ) + (0.5) (c out2 ) (v ripple2 2 - 2v out2 v ripple2 ) ] x f osc equation 2b. v ripple1 = [ i out1 / (f osc ) (c out1 ) ] + 2 (i out1 ) (esr cout1 ) equation 3a. v ripple2 = [ i out2 / (f osc ) (c out2 ) ] + 2 (i out2 ) (esr cout2 ) equation 3b. capacitor selection in order to maintain the lowest output resistance and output ripple voltage, it is recommended that low esr capacitors be used. additionally, larger values of c1 and c2 will lower the output resistance and larger values of c out1 and c out2 will reduce output ripple. (see equations 1a, 1b, 3a, and 3b). note: for proper charge pump operation, c1 and c out1 must have a voltage rating greater than or equal to v in , while c2 and c out2 must have a voltage rating greater than or equal to 2v in . table 1a shows various values of c1 and the corre- sponding output resistance values for v in =5v @ +25 c for stage 1 and table 1b shows various values of c2 and the corresponding output resistance values for v in =5v @ +25 c for stage 2. it assumes a 0.1 ? esr c1 , a 0.1 ? esr c2 , a 3 ? r switch1 , and a 7 ? r switch2 . table 2a shows the output voltage ripple for various values of c out1 and table 2b shows the output voltage ripple for various values of c out2 (again assuming v in =5v @ +25 o c). the v ripple1 values assume a 3ma output load current for stage 1 and a 0.1 ? esr cout1 . the v ripple2 values assume a 200ua output load current for stage 2 and a 0.1 ? esr cout1 . input supply bypassing thev in input should be capacitively bypassed to reduce ac impedance and minimize noise effects due to the switch- ing internal to the device. it is recommended that a large value capacitor (at least equal to c1) be connected from v in to gnd for optimal circuit performance. table 1a. output resistance vs. c1 (esr = 0.1 ? ). for stage 1 c1 ( f) tc1225 r out ( ? ) TC1226 r out ( ? ) tc1227 r out ( ? ) 0.47 202 85 42 1 108 53 33 3.3 50 33 27 table 1b. output resistance vs. c2 (esr = 0.1 ? ). for stage 2 c2 ( f) tc1225 r out ( ? ) TC1226 r out ( ? ) tc1227 r out ( ? ) 0.1 890 342 137 0.47 239 117 74 1 140 85 65 table 2a. output voltage ripple vs. c out1 (esr = 0.1 ? ) for stage 1 (i out1 = 3ma) c out1 tc1225 v ripple1 TC1226 v ripple1 tc1227 v ripple1 ( f) (mv) (mv) (mv) 0.47 533 183 52 1 251 86 25 3.3 76 27 8 table 2b. output voltage ripple vs. c out2 (esr = 0.1 ? ) for stage 2 (i out2 = 200 a) c out2 tc1225 v ripple2 TC1226 v ripple2 tc1227 v ripple2 ( f) (mv) (mv) (mv) 0.1 167 57 16 0.47 36 12 3.4 1 17 5.8 1.6
5 tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 inverting dual ( v in , 2v in ) charge pump voltage converters ?2001 microchip technology inc. ds21369a dual voltage inverter the most common application for the tc1225/1226/ 1227 devices is the dual voltage inverter (figure 2). this application uses four external capacitors: c1, c2, c out1 , and c out2 (note: a power supply bypass capacitor is recommended). the outputs are equal to ?v in and ?vin plus any voltage drops due to loading. refer to tables 1a, 1b, 2a, and 2b for capacitor selection guidelines. figure 2. dual voltage inverter test circuit layout considerations as with any switching power supply circuit good layout practice is recommended. mount components as close together as possible to minimize stray inductance and capacitance. also use a large ground plane to minimize noise leakage into other circuitry. tc1225 demo card the tc1225 demo card is a 2.0?x 2.0?card containing both a tc1225 and two cascaded tcm828s that allow the user to compare the operation of each approach for gener- ating a ?x and ?x function. each circuit is fully assembled with the required external capacitors along with variable load resistors that allow the user to vary the output load current of each stage. for convenience, several test points and jumpers are available for measuring various voltages and currents on the demo board. figure 3 is a schematic of the tc1225 demo card, and figure 4 shows the assembly drawing and artwork for the board. table 3 lists the voltages that are monitored by the test points and table 4 lists the currents that can be measured using the jumpers. table 3. tc1225 demo card test points test point voltage measurement tp1 vin [+5v] tp2 ground tp3 ground tp4 tcm828 u1 output [-5v(1)] tp5 tcm828 u2 output [-10v(1)] tp6 tc1225 stage 1 output [-5v(2)] tp7 tc1225 stage 2 output [-10v(2)] table 4. tc1225 demo card jumpers jumper current measuremnt j1 dual tcm828 quiescent current j2 tc1225 quiescent current j3 tcm828 u1 [-5v(1)] load current j4 tcm828 u2 [-10v(1)] load current j5 tc1225 stage 1 [-5v(2)] load current j6 tc1225 stage 2 [-10v(2)] load current c1 c2 v in c in r l1 v out1 v out2 r l2 v in v in c out1 c out2 2v in tc1225 TC1226 tc1227 c1 c2 2 1 7 6 8 4 5 3 c1 + c2 + gnd device c in c1 c2 c out1 c out2 tc1225 3.3 f 3.3 f 1 f 3.3 f 1 f TC1226 1 f 1 f 0.33 f 1 f 0.33 f tc1227 0.33 f 0.33 f 0.1 f 0.33 f 0.1 f
6 inverting dual ( v in , 2v in ) charge pump voltage converters tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 ?2001 microchip technology inc. ds21369a figure 3. tc1225 demo card schematic figure 4. tc1225 demo card assembly drawing and artwork
7 tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 inverting dual ( v in , 2v in ) charge pump voltage converters ?2001 microchip technology inc. ds21369a typical ripple waveforms
8 inverting dual ( v in , 2v in ) charge pump voltage converters tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 ?2001 microchip technology inc. ds21369a package dimensions dimensions: inches (mm) 8-pin msop .122 (3.10) .114 (2.90) .122 (3.10) .114 (2.90) .043 (1.10) max. .006 (0.15) .002 (0.05) .016 (0.40) .010 (0.25) .197 (5.00) .189 (4.80) .008 (0.20) .005 (0.13) .028 (0.70) .016 (0.40) 6 max. .026 (0.65) typ. pin 1 taping form pin 1 pin 1 component taping orientation for 8-pin msop devices user direction of feed user direction of feed standard reel component orientation for tr suffix device reverse reel component orientation for rt suffix device w p package carrier width (w) pitch (p) part per full reel reel size 8-pin msop 12 mm 8 mm 2500 13 in carrier tape, number of components per reel and reel size
9 tc1225 TC1226 tc1227 tc1225/6/7-1 3/24/00 inverting dual ( v in , 2v in ) charge pump voltage converters ? 2001 microchip technology inc. ds21369a information contained in this publication regarding device applications and the like is intended through suggestion only and ma y be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warrant y is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patent s or other intellectual property rights arising from such use or otherwise. use of microchip ? s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. the microchip logo and name are registered trademarks of microchip technology inc. in the u.s.a. and othe r countries. all rights reserved. all other trademarks mentioned herein are the property of their respective companies. all rights reserved. ? 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